Computer Organization and Architecture

Course Outline


Welcome to Computer Organization and Architecture - a foundational course designed to help you understand the practical art of selecting and interconnecting hardware components to create computers that meet functional, performance, and cost goals . This course introduces the core concepts of computer hardware, instruction sets, arithmetic, datapath design, pipelining, and memory hierarchy.


Module I: Introduction to Computer Architecture

  • Introduction to computer organization and architecture
  • Functional units of a computer (CPU, Memory, Input, Output)
  • Instruction cycle and system bus interconnections
  • Hierarchical layers of the hardware-software interface

Module II: Performance

  • Execution time, user time, and system time
  • Cycles per instruction (CPI) and Instruction per cycle (IPC)
  • CPU performance equation and the nature of execution time
  • Hardware-oriented metrics (MIPS, MOPS, MFLOPS)

Module III: Instructions - Language of the Computer

  • Instruction set architecture and MIPS register conventions
  • Memory operands, immediate operands, and constants
  • MIPS instruction formats (R-type, I-type, J-type)
  • Decision making, loops, and procedures/functions
  • MIPS addressing modes (Immediate, Register, Base, PC-relative, etc.)

Module IV: Computer Arithmetic

  • Number representation and two's complement
  • Sign extension and overflow detection
  • Multiplication hardware and flowchart
  • Floating-point representation and basic addition

Module V: Building a Datapath

  • Single-cycle datapath design and memory units
  • ALU and main control unit design
  • Implementing R-type, load/store, and branching instructions
  • Introduction to the multicycle approach

Module VI: Pipelining

  • Pipelining concepts and 5-stage instruction execution
  • Structural, control, and data hazards
  • Pipelined datapath and pipeline registers
  • Handling exceptions, interrupts, and traps

Module VII: Memory Hierarchy

  • Memory hierarchy structure (SRAM, DRAM, Disk)
  • Cache memory and placement strategies (Direct mapped, Set associative, Fully associative)
  • Handling cache misses and reducing miss penalty
  • Virtual memory and address translation

Module VIII: I/O Systems

  • I/O control and data transfer mechanisms
  • Bus types (Processor-memory, I/O, Backplane) and bus design issues
  • Direct Memory Access (DMA) controllers
  • I/O processors and interface registers

By the end of this course, you will understand the internal workings of computer hardware, how software instructions are translated and executed by the CPU, how memory is hierarchically managed, and how external systems communicate via buses - providing a strong foundation for advanced computer science subjects and hardware-level programming.